4.3.1 Thermomechanical Stress Modelling

Investigators

Dr Pei-Chieh Hsiao

Partners 5B (pending confirmation)

Tasks

• Build on existing research using finite element modelling to adapt cell metallisation patterns and ribbon geometry to minimise the stress induced in wafers during soldering or thermal cycling.

• Use the developed methods to evaluate the stress induced in modules with thinner wafers and new module (e.g., shingled, tiled) and module assembly architectures.

• Seek to work with Suncable and 5B an modelling stress in real-world conditions with their unique design and deployment conditions and locations.